1. Field of the Invention
The present invention relates to a method of scheduling a central processing unit (hereinafter, referred to as “CPU”) to minimize power consumption.
2. Background of the Related Art
Power management of microprocessors in the related art usually require extra hardware or require supplying a large amount of power to the microprocessors regardless of the power consumption of the microprocessors. FIG. 1 illustrates a related art combination of a microprocessor and the extra hardware required to control the power consumption for MSM family chips. FIG. 1 exhibits CPUs 1, 10, 100, e.g. MSMs 3100, fabricated by Qualcomm Co., a monitoring section 50 for monitoring the operating states of the CPUs 1, 10, 100, and a control section 40, e.g. a PM 1000 for controlling the CPUs 1, 10, 100 in response to an output signal generated from the monitoring section 50. Also, in this related art example, the commercial operating system (OS), and other partial real-time operating system do not care about the power consumption by the CPUs 1, 10, 100.
The system illustrated in FIG. 1 initiates operation with a monitoring section 50 monitoring the operating states of the CPUs 1, 10, 100 and then applying an output signal from the monitoring sections to the control section 40 according to the monitored result. The control section 40 then receives the output signal from the monitoring section 50, and controls the operating states of the multi-CPUs 1, 10, 100, wherein the operating states can be Run, Wait, Sleep, or Ready, etc., based on the received data to adjust the use of power (power supply) of the CPU.
However, in the case of such a related art method for adjusting power consumption of the CPU, the monitoring section 50 receives an output signal indicating the operating states of multi-CPUs 1, 10, 100 therefrom and then applies the output signal to a separate hardware, wherein the control section 40 controls the power consumption of the CPU. This additional control section 40 leads to an increase in manufacturing costs due to the extra hardware, as well as, an increase in the a complexity of the manufacturing process.
The above references are incorporated by reference herein where appropriate for appropriate teachings of additional or alternative details, features and/or technical background.